This invention relates to frequency synthesizers of the type which employ a phase locked loop for their operation.
Frequency synthesizers are commonly employed in communications, transmitters and receivers for deriving a large number of discrete frequencies from a single source.
FIG. 1 illustrates the basic mode of operation of a known synthesizer. It incorporates a stable crystal oscillator 1 which acts as a reference source, a phase detector 2 coupled to a charge pump 3, a passive low pass loop filter 4 and a voltage controlled oscillator (VCO) 5. The phase detector 2 and charge pump 3 produce a DC control voltage dependant upon the phase difference between the crystal oscillator I and the VCO 5 output signals. This control voltage is filtered to remove any unwanted AC components and then applied to the VCO 5 to vary its frequency. The action of this phase locked loop ensures that the frequency or phase of the VCO 5 changes in the direction that reduces any difference in frequency or phase between the reference (fR) and the VCO output (fc). Once lock has been achieved, the two inputs to the phase detector 2 are at the same frequency and in phase.
To obtain more than one frequency from the VCO 5, a frequency divider (e.g. ÷ N (counter)) 6 is inserted into the feedback loop 7 between the VCO 5 and the phase detector 2. Signals applied to the phase detector 2 are then at frequencies fR and fc/N and the VCO 5 runs at a frequency of NfR. Thus, the incorporation of a programmable ÷N (counter) in the loop allows a large number of discrete frequencies to be generated by altering the value of N. The increments in frequency that can be obtained are, of course, equal to the reference frequency fR.
The phase detector 2 is usually a digital device having an xe2x80x9cupxe2x80x9d and a xe2x80x9cdownxe2x80x9d output, both being connected to the charge pump 3, which in turn acts to supply current or to draw it from the loop filter 4 depending upon the state of the xe2x80x9cupxe2x80x9d and xe2x80x9cdownxe2x80x9d outputs.
The switching speed of a frequency synthesizer from one frequency to another is determined by the transient response of the phase locked loop. In some applications, e.g. communications systems which employ frequency hopping, it is desirable to keep the switching speed to a minimum. However, a compromise has to be made between lock time and filtering of unwanted signal components. The wider the loop bandwidth, the faster the lock time, but the worse the filtering, and vice versa.
One known way of overcoming this limitation is that of xe2x80x9csteeringxe2x80x9d the VCO to the desired frequency channel when a frequency hop is required. This involves breaking the loop momentarily, resetting the VCO control voltage (by some external means) at the correct level for the desired output frequency, then closing the loop again. Specifically, one known method for setting the VCO control voltage employs a digital to analogue converter (DAC) which is switched in to the filter input after the charge pump has been disabled. The DAC rapidly charges or discharges (as necessary) the filter, then the charge pump is re-enabled. Now the synthesizer is already on approximately the correct frequency, thereby saving the time taken to charge the filter using the charge pump outputs and obtain frequency acquisition. However, at this point, the two signals at the input to the phase detector are no longer in phase and this means that the loop must then obtain a phase lock. This limits the potential benefits available from the steering technique. Hence there is a need for a steered frequency synthesizer having a reduced time for achieving phase lock.
Accordingly, the present invention comprises a frequency synthesizer incorporating a phase locked loop and including:
a voltage controlled oscillator (VCO) for producing an output frequency,
a frequency divider connected to an output of the VCO for producing a divided VCO output frequency,
a phase detector for comparing a reference frequency with the divided VCO output frequency,
means for setting a VCO control voltage,
and a controller for disabling and re-enabling the phase locked loop and for resetting the frequency divider.
By providing a means for resetting a frequency divider, the frequency synthesizer of the present invention can achieve phase lock more rapidly than can a conventional device.
In one embodiment, the means for setting VCO control voltage comprises a DAC and the frequency divider is reset on the first detected edge of the reference frequency after the desired VCO voltage has been reached.
In a second embodiment, the VCO control voltage is set to the desired value by means of rapid charging (or discharging as appropriate) of a passive loop filter. The phase difference between the reference frequency and the divided VCO output is monitored until a minimum value is reached at which point the loop is re-enabled. During the phase monitoring period, the frequency divider is reset on at least one of the edges of the reference frequency.
Optionally, the second embodiment may include means for charging (or discharging as appropriate) the loop filter in a non linear manner.